This invention relates to a panel display control device performing display control of a panel display having display timing which is different from a CRT display. The panel display control device uses an application program produced for the CRT display and, more particularly, the panel display control device performs display control of a single drive type panel display having a screen which is divided into two sections.
In conformity with the recent tendency to reduce the size of office automation equipment, including personal computers and word processors, panel type displays such as liquid crystal and plasma displays are used more often as displays for these types of office automation equipment than CRT displays which have been predominantly used in the past.
As the panel type displays have become larger, to conform to the size of office automation equipment, there has been developed for the purpose of reducing the electrode capacity a double screen single drive type LCD panel display. As shown in FIG. 5, an LCD panel 21 is divided into two screens, for example an upper and a lower screen, which is driven by shift registers 22 and 23. In this type of display, as shown in FIG. 6, panel display data PDA of lines 1-240 constitute the upper screen and panel display data PDA of lines 241-480 constitute the lower screen. The data for the upper and lower screens is supplied alternately line by line.
The display timing of the panel type display is generally different from that of the CRT display. For this reason, when the prior art double screen single drive type panel display is to be driven [by] using an application program produced for the CRT display, the following method is generally adopted.
First, contents of a timing control register of an existing CRT controller are set at a timing which is equivalent to the timing of the panel display.
Then, a memory (VRAM) provided for display purposes and controlled by the CRT controller is accessed alternately for the upper and lower screens. To accomplish this, there are provided two memory address generation circuits for the upper and lower screens.
However, in a case where the contents of the controlling register are set to meet the timing of the panel display as described above, contents of the timing controlling register in the CRT controller are rewritten when the display mode is to be changed. The application program and the resulting contents of the register will not meet the set timing requirements for the panel display causing a failure in the display operation. Therefore, operation means such as a local CPU for converting the contents of the register set for the CRT display to the timing data for the panel display is required. This results in an increase in the cost of the components for the device.
Moreover, according to the above-described method in which the memory addresses are alternately produced for the upper and lower screens, special address generation circuits including two counters of different preset values are required.
Therefore, it is an object of the invention to provide a panel display control device capable of smoothly controlling the display of the double screen type panel display by using timing data set for the CRT display without substantially increasing the cost of the components for the device.
It is another object of the invention to provide a panel display control device which is capable of smoothly controlling the display of the double screen type panel display by using timing data for the CRT display. The display control device may also employ a general-purpose memory as a frame buffer.